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          配置 VS Code 的 Verilog 开发环境
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        <h1 id="安装-hdl-语言支持插件">安装 HDL 语言支持插件</h1>
<p>首先我们安装 <a target="_blank" rel="noopener" href="https://marketplace.visualstudio.com/items?itemName=mshr-h.VerilogHDL">Verilog-HDL/SystemVerilog/Bluespec SystemVerilog</a>。</p>
<figure>
<img src="https://pic.zhouyuqian.com/img/20210727233407.png" alt="截屏2021-03-15 下午2.22.14"><figcaption aria-hidden="true">截屏2021-03-15 下午2.22.14</figcaption>
</figure>
<p>它能够为包括 Verilog 在内的多种 HDL 提供语法高亮、常用代码片段、符号补全以及代码分析的功能。</p>
<p>然而不要着急，该插件并未实现后两种功能，而是从其他更专业的程序中获得帮助。因此我们还需要进行相应配置。</p>
<h1 id="使用-verilatoriverilog-作为代码分析工具">使用 Verilator/iVerilog 作为代码分析工具</h1>
<figure class="highlight shell"><table><tr><td class="gutter"><pre><span class="line">1</span><br><span class="line">2</span><br><span class="line">3</span><br><span class="line">4</span><br><span class="line">5</span><br><span class="line">6</span><br><span class="line">7</span><br></pre></td><td class="code"><pre><span class="line"><span class="meta">#</span><span class="bash"> Mac 安装 Verilator</span></span><br><span class="line">❯ brew install verilator</span><br><span class="line"><span class="meta">#</span><span class="bash"> Debian 系</span></span><br><span class="line">❯ sudo apt-get install verilator</span><br><span class="line"><span class="meta">#</span><span class="bash"> Windows</span></span><br><span class="line"><span class="meta">#</span><span class="bash"> Windows 可以使用 WSL</span></span><br><span class="line"><span class="meta">#</span><span class="bash"> 需要开启 Verilog &gt; Linting &gt; Verilator: Use WSL</span></span><br></pre></td></tr></table></figure>
<p>在 VS Code 的用户设置中 <code>Verilog &gt; Linting: Linter</code> 一项选择 <code>verilator</code>:</p>
<figure>
<img src="https://pic.zhouyuqian.com/img/20210727233408.png" alt="截屏2021-03-15 下午2.26.05"><figcaption aria-hidden="true">截屏2021-03-15 下午2.26.05</figcaption>
</figure>
<h1 id="使用-ctags-作为符号补全工具">使用 ctags 作为符号补全工具</h1>
<p><code>ctags</code> 是老牌的符号补全工具，至今你还可以在 <code>Vim</code> 中见到它的身影。</p>
<p>在 Linux 中可以直接通过包管理安装。</p>
<p>在 Windows 中则需要安装 <code>universal-ctags</code>。</p>
<p><strong>配置：</strong></p>
<figure>
<img src="https://pic.zhouyuqian.com/img/20210727233409.png" alt="ctags"><figcaption aria-hidden="true">ctags</figcaption>
</figure>
<p><strong>效果：</strong></p>
<ul>
<li><p>鼠标放在信号上，就会有声明显示在悬浮框中；</p></li>
<li><p>Ctrl+左键，点击信号名，自动跳转到声明处，</p>
<p>返回：</p>
<ul>
<li><strong>Windows</strong>: <code>Alt</code> + <code>←</code> ;或者 鼠标侧键</li>
<li><strong>Linux</strong>: <code>Ctrl</code> + <code>Alt</code> + <code>-</code> ;貌似数字键盘的减号没效果</li>
<li><strong>Mac</strong>: <code>Ctrl</code> + <code>-</code></li>
</ul></li>
<li><p>光标放在信号处，右键选择查看定义（快捷键可自行绑定），可以在此处展开声明处的代码，用于修改声明十分方便，就不用再来回跳转了。按ESC，关闭。</p></li>
</ul>
<h1 id="安装并配置代码格式化插件">安装并配置代码格式化插件</h1>
<p>接下来我们需要安装 <a target="_blank" rel="noopener" href="https://marketplace.visualstudio.com/items?itemName=IsaacT.verilog-formatter">verilog-formatter</a> 来进行格式化。</p>
<figure>
<img src="https://pic.zhouyuqian.com/img/20210727233410.png" alt="截屏2021-03-15 下午2.34.49"><figcaption aria-hidden="true">截屏2021-03-15 下午2.34.49</figcaption>
</figure>
<p>除此之外，我们需要下载 <a target="_blank" rel="noopener" href="https://github.com/0qinghao/istyle-verilog-formatter/releases">编译后的 iStyle</a> 或者 <a target="_blank" rel="noopener" href="https://github.com/thomasrussellmurphy/istyle-verilog-formatter/releases">iStyle 源代码</a>并手动编译(<code>make all</code>)。</p>
<p>最后在 VS Code 中配置 <code>Verilog-formatter &gt; Istyle</code> 到你的可执行文件。</p>
<p>另外在下方的 <code>Verilog-formatter &gt; Istyle: Style</code> 一项，你可以选择多种格式化方式，我比较喜欢 <code>kr</code>。</p>
<figure>
<img src="https://pic.zhouyuqian.com/img/20210727233411.png" alt="截屏2021-03-15 下午2.37.03"><figcaption aria-hidden="true">截屏2021-03-15 下午2.37.03</figcaption>
</figure>
<p>之后在 VS Code 中，每当调用 <code>Format Document</code> 命令(<code>Ctrl+Shift+P</code> 后输入)，当前文件就会进行格式化（快捷键 <code>Shift + Alt + F</code>）。</p>
<h1 id="将文件代码与-vivado-项目分离">将文件代码与 Vivado 项目分离</h1>
<p>通常来说，新手在创建一个 Vivado 项目之后，常常会在 Vivado 中新建 Verilog 文件，然后直接编辑。</p>
<p>这样的结果就是，<strong>Verilog 代码会埋在 Vivado 项目很深的路径之中</strong>：</p>
<figure class="highlight haxe"><table><tr><td class="gutter"><pre><span class="line">1</span><br><span class="line">2</span><br><span class="line">3</span><br><span class="line">4</span><br><span class="line">5</span><br></pre></td><td class="code"><pre><span class="line">└── vivado <span class="meta"># 你的 Vivado 项目</span></span><br><span class="line">    └── vivado.srcs</span><br><span class="line">        └── sources_1</span><br><span class="line">            └── <span class="keyword">new</span><span class="type"></span></span><br><span class="line"><span class="type"></span>                └── your-verilog-file.v <span class="meta"># 你的 Verilog 文件</span></span><br></pre></td></tr></table></figure>
<p>但是这样既不方便你通过 VS Code 打开代码，也不方便使用 Git 进行版本控制。</p>
<p>因此正确的方式应该是在<strong>独立的文件夹</strong>中手动创建 <code>.v</code> 文件：</p>
<figure class="highlight applescript"><table><tr><td class="gutter"><pre><span class="line">1</span><br><span class="line">2</span><br><span class="line">3</span><br></pre></td><td class="code"><pre><span class="line">├── vivado <span class="comment"># 你的 Vivado 项目</span></span><br><span class="line">└── src</span><br><span class="line">    └── your-verilog-<span class="built_in">file</span>.v <span class="comment"># 你的 Verilog 文件</span></span><br></pre></td></tr></table></figure>
<p>然后在 Vivado 中通过 <code>Add Directory</code> 将整个 <code>src</code> 目录添加到 Vivado 开发环境中，Vivado 将自动寻找可能的顶层文件，并自动梳理文件间依赖关系。</p>
<p>注意 Vivado 对文件更新的监听规则为：自动监听已经加入的文件，不监听新创建的文件。也就是说：<strong>如果你新建了一个 Verilog 文件，则需要再次添加入 Vivado 项目中</strong>。</p>
<h1 id="用-git-进行版本控制">用 Git 进行版本控制</h1>
<p>通过 <a target="_blank" rel="noopener" href="https://www.toptal.com/developers/gitignore">gitignore.io</a>，你可以快速生成一份可用的 <a target="_blank" rel="noopener" href="https://www.toptal.com/developers/gitignore/api/vivado,visualstudiocode"><code>.gitignore</code> 文件</a>，或者基于此进行改进。</p>
<figure>
<img src="https://pic.zhouyuqian.com/img/20210727233412.png" alt="截屏2021-03-15 下午2.38.27"><figcaption aria-hidden="true">截屏2021-03-15 下午2.38.27</figcaption>
</figure>
<h1 id="自动生成例化自动生成testbench">自动生成例化，自动生成testbench</h1>
<p>安装的第一个插件Verilog-HDL/System...就有自动例化功能</p>
<p>按F1或者Ctrl+Shift+P，输入</p>
<figure class="highlight text"><table><tr><td class="gutter"><pre><span class="line">1</span><br></pre></td><td class="code"><pre><span class="line">verilog:instantiate</span><br></pre></td></tr></table></figure>
<p>非常的好用，但是不够完美。</p>
<p>需要安装插件 <a target="_blank" rel="noopener" href="https://marketplace.visualstudio.com/items?itemName=Truecrab.verilog-testbench-instance">Verilog_Testbench</a></p>
<figure>
<img src="https://pic.zhouyuqian.com/img/20210727233413.png" alt="截屏2021-03-15 下午2.53.03"><figcaption aria-hidden="true">截屏2021-03-15 下午2.53.03</figcaption>
</figure>
<p>按F1或者Ctrl+Shift+P，输入:</p>
<figure class="highlight bash"><table><tr><td class="gutter"><pre><span class="line">1</span><br><span class="line">2</span><br></pre></td><td class="code"><pre><span class="line">Instance <span class="comment"># 例化</span></span><br><span class="line">Testbench <span class="comment"># tb</span></span><br></pre></td></tr></table></figure>
<figure>
<img src="https://pic.zhouyuqian.com/img/20210727233414.png" alt="截屏2021-03-15 下午3.03.33"><figcaption aria-hidden="true">截屏2021-03-15 下午3.03.33</figcaption>
</figure>
<p>可以会报错缺少文件：</p>
<figure class="highlight awk"><table><tr><td class="gutter"><pre><span class="line">1</span><br></pre></td><td class="code"><pre><span class="line">can<span class="string">&#x27;t open file &#x27;</span>~<span class="regexp">/.vscode/</span>extensions<span class="regexp">/truecrab.verilog-testbench-instance-0.0.5/</span>outvTbgenerator.py<span class="string">&#x27;: [Errno 2] No such file or directory</span></span><br></pre></td></tr></table></figure>
<p>其实是路径的写法有问题：</p>
<figure class="highlight awk"><table><tr><td class="gutter"><pre><span class="line">1</span><br></pre></td><td class="code"><pre><span class="line">python <span class="regexp">/Users/</span>zhouyuqian<span class="regexp">/.vscode/</span>extensions<span class="regexp">/truecrab.verilog-testbench-instance-0.0.5/</span>out\vTbgenerator.py</span><br></pre></td></tr></table></figure>
<p>直接在对应位置创建一个超链接就可以了。</p>
<p><del>创建相应的文件，内容如下：</del></p>
<figure class="highlight python"><table><tr><td class="gutter"><pre><span class="line">1</span><br><span class="line">2</span><br><span class="line">3</span><br><span class="line">4</span><br><span class="line">5</span><br><span class="line">6</span><br><span class="line">7</span><br><span class="line">8</span><br><span class="line">9</span><br><span class="line">10</span><br><span class="line">11</span><br><span class="line">12</span><br><span class="line">13</span><br><span class="line">14</span><br><span class="line">15</span><br><span class="line">16</span><br><span class="line">17</span><br><span class="line">18</span><br><span class="line">19</span><br><span class="line">20</span><br><span class="line">21</span><br><span class="line">22</span><br><span class="line">23</span><br><span class="line">24</span><br><span class="line">25</span><br><span class="line">26</span><br><span class="line">27</span><br><span class="line">28</span><br><span class="line">29</span><br><span class="line">30</span><br><span class="line">31</span><br><span class="line">32</span><br><span class="line">33</span><br><span class="line">34</span><br><span class="line">35</span><br><span class="line">36</span><br><span class="line">37</span><br><span class="line">38</span><br><span class="line">39</span><br><span class="line">40</span><br><span class="line">41</span><br><span class="line">42</span><br><span class="line">43</span><br><span class="line">44</span><br><span class="line">45</span><br><span class="line">46</span><br><span class="line">47</span><br><span class="line">48</span><br><span class="line">49</span><br><span class="line">50</span><br><span class="line">51</span><br><span class="line">52</span><br><span class="line">53</span><br><span class="line">54</span><br><span class="line">55</span><br><span class="line">56</span><br><span class="line">57</span><br><span class="line">58</span><br><span class="line">59</span><br><span class="line">60</span><br><span class="line">61</span><br><span class="line">62</span><br><span class="line">63</span><br><span class="line">64</span><br><span class="line">65</span><br><span class="line">66</span><br><span class="line">67</span><br><span class="line">68</span><br><span class="line">69</span><br><span class="line">70</span><br><span class="line">71</span><br><span class="line">72</span><br><span class="line">73</span><br><span class="line">74</span><br><span class="line">75</span><br><span class="line">76</span><br><span class="line">77</span><br><span class="line">78</span><br><span class="line">79</span><br><span class="line">80</span><br><span class="line">81</span><br><span class="line">82</span><br><span class="line">83</span><br><span class="line">84</span><br><span class="line">85</span><br><span class="line">86</span><br><span class="line">87</span><br><span class="line">88</span><br><span class="line">89</span><br><span class="line">90</span><br><span class="line">91</span><br><span class="line">92</span><br><span class="line">93</span><br><span class="line">94</span><br><span class="line">95</span><br><span class="line">96</span><br><span class="line">97</span><br><span class="line">98</span><br><span class="line">99</span><br><span class="line">100</span><br><span class="line">101</span><br><span class="line">102</span><br><span class="line">103</span><br><span class="line">104</span><br><span class="line">105</span><br><span class="line">106</span><br><span class="line">107</span><br><span class="line">108</span><br><span class="line">109</span><br><span class="line">110</span><br><span class="line">111</span><br><span class="line">112</span><br><span class="line">113</span><br><span class="line">114</span><br><span class="line">115</span><br><span class="line">116</span><br><span class="line">117</span><br><span class="line">118</span><br><span class="line">119</span><br><span class="line">120</span><br><span class="line">121</span><br><span class="line">122</span><br><span class="line">123</span><br><span class="line">124</span><br><span class="line">125</span><br><span class="line">126</span><br><span class="line">127</span><br><span class="line">128</span><br><span class="line">129</span><br><span class="line">130</span><br><span class="line">131</span><br><span class="line">132</span><br><span class="line">133</span><br><span class="line">134</span><br><span class="line">135</span><br><span class="line">136</span><br><span class="line">137</span><br><span class="line">138</span><br><span class="line">139</span><br><span class="line">140</span><br><span class="line">141</span><br><span class="line">142</span><br><span class="line">143</span><br><span class="line">144</span><br><span class="line">145</span><br><span class="line">146</span><br><span class="line">147</span><br><span class="line">148</span><br><span class="line">149</span><br><span class="line">150</span><br><span class="line">151</span><br><span class="line">152</span><br><span class="line">153</span><br><span class="line">154</span><br><span class="line">155</span><br><span class="line">156</span><br><span class="line">157</span><br><span class="line">158</span><br><span class="line">159</span><br><span class="line">160</span><br><span class="line">161</span><br><span class="line">162</span><br><span class="line">163</span><br><span class="line">164</span><br><span class="line">165</span><br><span class="line">166</span><br><span class="line">167</span><br><span class="line">168</span><br><span class="line">169</span><br><span class="line">170</span><br><span class="line">171</span><br><span class="line">172</span><br><span class="line">173</span><br><span class="line">174</span><br><span class="line">175</span><br><span class="line">176</span><br><span class="line">177</span><br><span class="line">178</span><br><span class="line">179</span><br><span class="line">180</span><br><span class="line">181</span><br><span class="line">182</span><br><span class="line">183</span><br><span class="line">184</span><br><span class="line">185</span><br><span class="line">186</span><br><span class="line">187</span><br><span class="line">188</span><br><span class="line">189</span><br><span class="line">190</span><br><span class="line">191</span><br><span class="line">192</span><br><span class="line">193</span><br><span class="line">194</span><br><span class="line">195</span><br><span class="line">196</span><br><span class="line">197</span><br><span class="line">198</span><br><span class="line">199</span><br><span class="line">200</span><br><span class="line">201</span><br><span class="line">202</span><br><span class="line">203</span><br><span class="line">204</span><br><span class="line">205</span><br><span class="line">206</span><br><span class="line">207</span><br><span class="line">208</span><br><span class="line">209</span><br><span class="line">210</span><br><span class="line">211</span><br><span class="line">212</span><br><span class="line">213</span><br><span class="line">214</span><br><span class="line">215</span><br><span class="line">216</span><br><span class="line">217</span><br><span class="line">218</span><br><span class="line">219</span><br><span class="line">220</span><br><span class="line">221</span><br><span class="line">222</span><br><span class="line">223</span><br><span class="line">224</span><br><span class="line">225</span><br><span class="line">226</span><br><span class="line">227</span><br><span class="line">228</span><br><span class="line">229</span><br><span class="line">230</span><br><span class="line">231</span><br><span class="line">232</span><br><span class="line">233</span><br><span class="line">234</span><br><span class="line">235</span><br><span class="line">236</span><br><span class="line">237</span><br><span class="line">238</span><br><span class="line">239</span><br><span class="line">240</span><br><span class="line">241</span><br><span class="line">242</span><br><span class="line">243</span><br><span class="line">244</span><br><span class="line">245</span><br><span class="line">246</span><br><span class="line">247</span><br><span class="line">248</span><br><span class="line">249</span><br><span class="line">250</span><br><span class="line">251</span><br><span class="line">252</span><br><span class="line">253</span><br><span class="line">254</span><br><span class="line">255</span><br><span class="line">256</span><br><span class="line">257</span><br><span class="line">258</span><br><span class="line">259</span><br><span class="line">260</span><br><span class="line">261</span><br><span class="line">262</span><br><span class="line">263</span><br><span class="line">264</span><br><span class="line">265</span><br><span class="line">266</span><br><span class="line">267</span><br><span class="line">268</span><br><span class="line">269</span><br><span class="line">270</span><br><span class="line">271</span><br><span class="line">272</span><br><span class="line">273</span><br><span class="line">274</span><br><span class="line">275</span><br><span class="line">276</span><br><span class="line">277</span><br><span class="line">278</span><br><span class="line">279</span><br><span class="line">280</span><br><span class="line">281</span><br><span class="line">282</span><br><span class="line">283</span><br><span class="line">284</span><br><span class="line">285</span><br><span class="line">286</span><br><span class="line">287</span><br><span class="line">288</span><br><span class="line">289</span><br><span class="line">290</span><br><span class="line">291</span><br><span class="line">292</span><br><span class="line">293</span><br><span class="line">294</span><br><span class="line">295</span><br><span class="line">296</span><br><span class="line">297</span><br><span class="line">298</span><br><span class="line">299</span><br><span class="line">300</span><br><span class="line">301</span><br><span class="line">302</span><br><span class="line">303</span><br></pre></td><td class="code"><pre><span class="line"><span class="comment">#! /usr/bin/env python</span></span><br><span class="line"></span><br><span class="line"><span class="string">&#x27;&#x27;&#x27;</span></span><br><span class="line"><span class="string">vTbgenerator.py -- generate verilog module Testbench</span></span><br><span class="line"><span class="string">generated bench file like this:</span></span><br><span class="line"><span class="string"></span></span><br><span class="line"><span class="string"></span></span><br><span class="line"><span class="string">        fifo_sc #(</span></span><br><span class="line"><span class="string">            .DATA_WIDTH ( 8 ),</span></span><br><span class="line"><span class="string">            .ADDR_WIDTH ( 8 )</span></span><br><span class="line"><span class="string">        )</span></span><br><span class="line"><span class="string">         u_fifo_sc (</span></span><br><span class="line"><span class="string">            .CLK   ( CLK                     ),</span></span><br><span class="line"><span class="string">            .RST_N ( RST_N                   ),</span></span><br><span class="line"><span class="string">            .RD_EN ( RD_EN                   ),</span></span><br><span class="line"><span class="string">            .WR_EN ( WR_EN                   ),</span></span><br><span class="line"><span class="string">            .DIN   ( DIN   [DATA_WIDTH-1 :0] ),</span></span><br><span class="line"><span class="string">            .DOUT  ( DOUT  [DATA_WIDTH-1 :0] ),</span></span><br><span class="line"><span class="string">            .EMPTY ( EMPTY                   ),</span></span><br><span class="line"><span class="string">            .FULL  ( FULL                    )</span></span><br><span class="line"><span class="string">        );</span></span><br><span class="line"><span class="string"></span></span><br><span class="line"><span class="string"></span></span><br><span class="line"><span class="string">Usage:</span></span><br><span class="line"><span class="string">      python vTbgenerator.py ModuleFileName.v</span></span><br><span class="line"><span class="string"></span></span><br><span class="line"><span class="string"></span></span><br><span class="line"><span class="string">&#x27;&#x27;&#x27;</span></span><br><span class="line"><span class="keyword">import</span> random</span><br><span class="line"><span class="keyword">import</span> re</span><br><span class="line"><span class="keyword">import</span> sys</span><br><span class="line"><span class="keyword">from</span> queue <span class="keyword">import</span> Queue</span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="keyword">import</span> chardet</span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="function"><span class="keyword">def</span> <span class="title">delComment</span>(<span class="params">Text</span>):</span></span><br><span class="line">    <span class="string">&quot;&quot;&quot; removed comment &quot;&quot;&quot;</span></span><br><span class="line">    single_line_comment = re.<span class="built_in">compile</span>(<span class="string">r&quot;//(.*)$&quot;</span>, re.MULTILINE)</span><br><span class="line">    multi_line_comment = re.<span class="built_in">compile</span>(<span class="string">r&quot;/\*(.*?)\*/&quot;</span>, re.DOTALL)</span><br><span class="line">    Text = multi_line_comment.sub(<span class="string">&#x27;\n&#x27;</span>, Text)</span><br><span class="line">    Text = single_line_comment.sub(<span class="string">&#x27;\n&#x27;</span>, Text)</span><br><span class="line">    <span class="keyword">return</span> Text</span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="function"><span class="keyword">def</span> <span class="title">delBlock</span>(<span class="params">Text</span>):</span></span><br><span class="line">    <span class="string">&quot;&quot;&quot; removed task and function block &quot;&quot;&quot;</span></span><br><span class="line">    Text = re.sub(<span class="string">r&#x27;\Wtask\W[\W\w]*?\Wendtask\W&#x27;</span>, <span class="string">&#x27;\n&#x27;</span>, Text)</span><br><span class="line">    Text = re.sub(<span class="string">r&#x27;\Wfunction\W[\W\w]*?\Wendfunction\W&#x27;</span>, <span class="string">&#x27;\n&#x27;</span>, Text)</span><br><span class="line">    <span class="keyword">return</span> Text</span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="function"><span class="keyword">def</span> <span class="title">findName</span>(<span class="params">inText</span>):</span></span><br><span class="line">    <span class="string">&quot;&quot;&quot; find module name and port list&quot;&quot;&quot;</span></span><br><span class="line">    p = re.search(<span class="string">r&#x27;([a-zA-Z_][a-zA-Z_0-9]*)\s*&#x27;</span>, inText)</span><br><span class="line">    mo_Name = p.group(<span class="number">0</span>).strip()</span><br><span class="line">    <span class="keyword">return</span> mo_Name</span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="function"><span class="keyword">def</span> <span class="title">paraDeclare</span>(<span class="params">inText, portArr</span>):</span></span><br><span class="line">    <span class="string">&quot;&quot;&quot; find parameter declare &quot;&quot;&quot;</span></span><br><span class="line">    pat = <span class="string">r&#x27;\s&#x27;</span> + portArr + <span class="string">r&#x27;\s[\w\W]*?[;,)]&#x27;</span></span><br><span class="line">    ParaList = re.findall(pat, inText)</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">    <span class="keyword">return</span> ParaList</span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="function"><span class="keyword">def</span> <span class="title">portDeclare</span>(<span class="params">inText, portArr</span>):</span></span><br><span class="line">    <span class="string">&quot;&quot;&quot;find port declare, Syntax:</span></span><br><span class="line"><span class="string">       input [ net_type ] [ signed ] [ range ] list_of_port_identifiers</span></span><br><span class="line"><span class="string"></span></span><br><span class="line"><span class="string"></span></span><br><span class="line"><span class="string">       return list as : (port, [range])</span></span><br><span class="line"><span class="string">    &quot;&quot;&quot;</span></span><br><span class="line">    port_definition = re.<span class="built_in">compile</span>(</span><br><span class="line">        <span class="string">r&#x27;\b&#x27;</span> + portArr +</span><br><span class="line">        <span class="string">r&#x27;&#x27;&#x27; (\s+(wire|reg|logic|interface)\s+)* (\s*signed\s+)*  (\s*\[.*?:.*?\]\s*)*</span></span><br><span class="line"><span class="string">        (?P&lt;port_list&gt;.*?)</span></span><br><span class="line"><span class="string">        (?= \binput\b | \boutput\b | \binout\b | ; | \) )</span></span><br><span class="line"><span class="string">        &#x27;&#x27;&#x27;</span>,</span><br><span class="line">        re.VERBOSE | re.MULTILINE | re.DOTALL</span><br><span class="line">    )</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">    pList = port_definition.findall(inText)</span><br><span class="line">    t = []</span><br><span class="line">    <span class="keyword">for</span> ls <span class="keyword">in</span> pList:</span><br><span class="line">        <span class="keyword">if</span> <span class="built_in">len</span>(ls) &gt;= <span class="number">2</span>:</span><br><span class="line">            t = t + portDic(ls[-<span class="number">2</span>:])</span><br><span class="line">    <span class="keyword">return</span> t</span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="function"><span class="keyword">def</span> <span class="title">portDic</span>(<span class="params">port</span>):</span></span><br><span class="line">    <span class="string">&quot;&quot;&quot;delet as : input a =c &amp;d;</span></span><br><span class="line"><span class="string">        return list as : (port, [range])</span></span><br><span class="line"><span class="string">    &quot;&quot;&quot;</span></span><br><span class="line">    pRe = re.<span class="built_in">compile</span>(<span class="string">r&#x27;(.*?)\s*=.*&#x27;</span>, re.DOTALL)</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">    pRange = port[<span class="number">0</span>]</span><br><span class="line">    pList = port[<span class="number">1</span>].split(<span class="string">&#x27;,&#x27;</span>)</span><br><span class="line">    pList = [i.strip() <span class="keyword">for</span> i <span class="keyword">in</span> pList <span class="keyword">if</span> i.strip() != <span class="string">&#x27;&#x27;</span>]</span><br><span class="line">    pList = [(pRe.sub(<span class="string">r&#x27;\1&#x27;</span>, p), pRange.strip()) <span class="keyword">for</span> p <span class="keyword">in</span> pList]</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">    <span class="keyword">return</span> pList</span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="function"><span class="keyword">def</span> <span class="title">formatPort</span>(<span class="params">AllPortList, isPortRange=<span class="number">1</span></span>):</span></span><br><span class="line">    PortList = AllPortList</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">    <span class="built_in">str</span> = <span class="string">&#x27;&#x27;</span></span><br><span class="line">    <span class="keyword">if</span> PortList != []:</span><br><span class="line">        l1 = <span class="built_in">max</span>([<span class="built_in">len</span>(i[<span class="number">0</span>]) <span class="keyword">for</span> i <span class="keyword">in</span> PortList])+<span class="number">2</span></span><br><span class="line">        l3 = <span class="built_in">max</span>(<span class="number">18</span>, l1)</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">        strList = []</span><br><span class="line">        <span class="built_in">str</span> = <span class="string">&#x27;,\n&#x27;</span>.join([<span class="string">&#x27; &#x27;</span> * <span class="number">4</span> + <span class="string">&#x27;.&#x27;</span> + i[<span class="number">0</span>].ljust(l3)</span><br><span class="line">                          + <span class="string">&#x27;(&#x27;</span> + (i[<span class="number">0</span>]) + <span class="string">&#x27;)&#x27;</span> <span class="keyword">for</span> i <span class="keyword">in</span> AllPortList])</span><br><span class="line">        strList = strList + [<span class="built_in">str</span>]</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">        <span class="built_in">str</span> = <span class="string">&#x27;,\n\n&#x27;</span>.join(strList)</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">    <span class="keyword">return</span> <span class="built_in">str</span></span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="function"><span class="keyword">def</span> <span class="title">formatDeclare</span>(<span class="params">PortList, portArr, initial=<span class="string">&quot;&quot;</span></span>):</span></span><br><span class="line">    <span class="built_in">str</span> = <span class="string">&#x27;&#x27;</span></span><br><span class="line"></span><br><span class="line"></span><br><span class="line">    <span class="keyword">if</span> PortList != []:</span><br><span class="line">        <span class="built_in">str</span> = <span class="string">&#x27;\n&#x27;</span>.join([portArr.ljust(<span class="number">4</span>) + <span class="string">&#x27;  &#x27;</span>+(i[<span class="number">1</span>]+<span class="built_in">min</span>(<span class="built_in">len</span>(i[<span class="number">1</span>]), <span class="number">1</span>)*<span class="string">&#x27;  &#x27;</span></span><br><span class="line">                                                  + i[<span class="number">0</span>]) + <span class="string">&#x27;;&#x27;</span> <span class="keyword">for</span> i <span class="keyword">in</span> PortList])</span><br><span class="line">    <span class="keyword">return</span> <span class="built_in">str</span></span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="function"><span class="keyword">def</span> <span class="title">formatPara</span>(<span class="params">ParaList</span>):</span></span><br><span class="line">    paraDec = <span class="string">&#x27;&#x27;</span></span><br><span class="line">    paraDef = <span class="string">&#x27;&#x27;</span></span><br><span class="line">    <span class="keyword">if</span> ParaList != []:</span><br><span class="line">        s = <span class="string">&#x27;\n&#x27;</span>.join(ParaList)</span><br><span class="line">        pat = <span class="string">r&#x27;([a-zA-Z_][a-zA-Z_0-9]*)\s*=\s*([\w\W]*?)\s*[;,)]&#x27;</span></span><br><span class="line">        p = re.findall(pat, s)</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">        l1 = <span class="built_in">max</span>([<span class="built_in">len</span>(i[<span class="number">0</span>]) <span class="keyword">for</span> i <span class="keyword">in</span> p])</span><br><span class="line">        l2 = <span class="built_in">max</span>([<span class="built_in">len</span>(i[<span class="number">1</span>]) <span class="keyword">for</span> i <span class="keyword">in</span> p])</span><br><span class="line">        paraDec = <span class="string">&#x27;\n&#x27;</span>.join([<span class="string">&#x27;parameter %s = %s;&#x27;</span></span><br><span class="line">                             % (i[<span class="number">0</span>].ljust(l1 + <span class="number">1</span>), i[<span class="number">1</span>].ljust(l2))</span><br><span class="line">                             <span class="keyword">for</span> i <span class="keyword">in</span> p])</span><br><span class="line">        paraDef = <span class="string">&#x27;#(\n&#x27;</span> + <span class="string">&#x27;,\n&#x27;</span>.join([<span class="string">&#x27;    .&#x27;</span> + i[<span class="number">0</span>].ljust(l1 + <span class="number">1</span>)</span><br><span class="line">                                       + <span class="string">&#x27;( &#x27;</span> + i[<span class="number">1</span>].ljust(l2)+<span class="string">&#x27; )&#x27;</span> <span class="keyword">for</span> i <span class="keyword">in</span> p]) + <span class="string">&#x27;)\n&#x27;</span></span><br><span class="line">    <span class="keyword">return</span> paraDec, paraDef</span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="function"><span class="keyword">def</span> <span class="title">portT</span>(<span class="params">inText, ioPadAttr</span>):</span></span><br><span class="line">    x = &#123;&#125;</span><br><span class="line">    count_list = []</span><br><span class="line">    order_list = []</span><br><span class="line">    <span class="keyword">for</span> i <span class="keyword">in</span> ioPadAttr:</span><br><span class="line">        p = port_index_list(inText, i)</span><br><span class="line">        <span class="keyword">for</span> j <span class="keyword">in</span> p:</span><br><span class="line">            count_list.append(j)</span><br><span class="line">            x[j] = i</span><br><span class="line">    count_list = quick_sort(count_list, <span class="number">0</span>, <span class="built_in">len</span>(count_list)-<span class="number">1</span>)</span><br><span class="line">    <span class="keyword">for</span> c <span class="keyword">in</span> count_list:</span><br><span class="line">        order_list.append(x.get(c))</span><br><span class="line">    <span class="keyword">return</span> order_list</span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="function"><span class="keyword">def</span> <span class="title">quick_sort</span>(<span class="params">myList, start, end</span>):</span></span><br><span class="line">    <span class="keyword">if</span> start &lt; end:</span><br><span class="line">        i, j = start, end</span><br><span class="line">        base = myList[i]</span><br><span class="line">        <span class="keyword">while</span> i &lt; j:</span><br><span class="line">            <span class="keyword">while</span> (i &lt; j) <span class="keyword">and</span> (myList[j] &gt;= base):</span><br><span class="line">                j = j - <span class="number">1</span></span><br><span class="line"></span><br><span class="line"></span><br><span class="line">            myList[i] = myList[j]</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">            <span class="keyword">while</span> (i &lt; j) <span class="keyword">and</span> (myList[i] &lt;= base):</span><br><span class="line">                i = i + <span class="number">1</span></span><br><span class="line">            myList[j] = myList[i]</span><br><span class="line">        myList[i] = base</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">        quick_sort(myList, start, i - <span class="number">1</span>)</span><br><span class="line">        quick_sort(myList, j + <span class="number">1</span>, end)</span><br><span class="line">    <span class="keyword">return</span> myList</span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="function"><span class="keyword">def</span> <span class="title">formatPort_order</span>(<span class="params">padAttr, orderList</span>):</span></span><br><span class="line"></span><br><span class="line"></span><br><span class="line">    <span class="keyword">for</span> p <span class="keyword">in</span> padAttr:</span><br><span class="line">        q = Queue()</span><br><span class="line">        <span class="keyword">for</span> i <span class="keyword">in</span> padAttr.get(p):</span><br><span class="line">            q.put(i)</span><br><span class="line">        padAttr[p] = q</span><br><span class="line">    AllPortList = []</span><br><span class="line">    <span class="keyword">for</span> o <span class="keyword">in</span> orderList:</span><br><span class="line">        AllPortList.append(padAttr.get(o).get())</span><br><span class="line">    <span class="keyword">return</span> AllPortList</span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="function"><span class="keyword">def</span> <span class="title">port_index_list</span>(<span class="params">intext, text</span>):</span></span><br><span class="line">    l = []</span><br><span class="line">    t = intext</span><br><span class="line">    index = t.find(text)</span><br><span class="line">    <span class="keyword">while</span> index &gt; -<span class="number">1</span>:</span><br><span class="line">        t = t.replace(text, random_str(<span class="built_in">len</span>(text)), <span class="number">1</span>)</span><br><span class="line">        l.append(index)</span><br><span class="line">        index = t.find(text)</span><br><span class="line">    <span class="keyword">return</span> l</span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="function"><span class="keyword">def</span> <span class="title">random_str</span>(<span class="params">size</span>):</span></span><br><span class="line">    s = <span class="string">&#x27;&#x27;</span></span><br><span class="line">    <span class="keyword">for</span> i <span class="keyword">in</span> <span class="built_in">range</span>(size):</span><br><span class="line">        s += <span class="built_in">str</span>(random.randint(<span class="number">0</span>, <span class="number">9</span>))</span><br><span class="line">    <span class="keyword">return</span> s</span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="function"><span class="keyword">def</span> <span class="title">getPortMap</span>(<span class="params">AllPortList, ioPadAttr</span>):</span></span><br><span class="line">    <span class="keyword">if</span> <span class="built_in">len</span>(AllPortList) != <span class="built_in">len</span>(ioPadAttr):</span><br><span class="line">        <span class="keyword">return</span></span><br><span class="line"></span><br><span class="line"></span><br><span class="line">    p_map = &#123;&#125;</span><br><span class="line">    <span class="keyword">for</span> i <span class="keyword">in</span> <span class="built_in">range</span>(<span class="built_in">len</span>(AllPortList)):</span><br><span class="line">        p_map[ioPadAttr[i]] = AllPortList[i]</span><br><span class="line">    <span class="keyword">return</span> p_map</span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="function"><span class="keyword">def</span> <span class="title">writeTestBench</span>(<span class="params">input_file</span>):</span></span><br><span class="line">    <span class="string">&quot;&quot;&quot; write testbench to file &quot;&quot;&quot;</span></span><br><span class="line">    <span class="keyword">with</span> <span class="built_in">open</span>(input_file, <span class="string">&#x27;rb&#x27;</span>) <span class="keyword">as</span> f:</span><br><span class="line">        f_info = chardet.detect(f.read())</span><br><span class="line">        f_encoding = f_info[<span class="string">&#x27;encoding&#x27;</span>]</span><br><span class="line">    <span class="keyword">with</span> <span class="built_in">open</span>(input_file, encoding=f_encoding) <span class="keyword">as</span> inFile:</span><br><span class="line">        inText = inFile.read()</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">    <span class="comment"># removed comment,task,function</span></span><br><span class="line">    inText = delComment(inText)</span><br><span class="line">    inText = delBlock(inText)</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">    <span class="comment"># moduel ... endmodule  #</span></span><br><span class="line">    moPos_begin = re.search(<span class="string">r&#x27;(\b|^)module\b&#x27;</span>, inText).end()</span><br><span class="line">    moPos_end = re.search(<span class="string">r&#x27;\bendmodule\b&#x27;</span>, inText).start()</span><br><span class="line">    inText = inText[moPos_begin:moPos_end]</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">    name = findName(inText)</span><br><span class="line">    paraList = paraDeclare(inText, <span class="string">&#x27;parameter&#x27;</span>)</span><br><span class="line">    paraDec, paraDef = formatPara(paraList)</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">    ioPadAttr = [<span class="string">&#x27;input&#x27;</span>, <span class="string">&#x27;output&#x27;</span>, <span class="string">&#x27;inout&#x27;</span>,<span class="string">&#x27;interface&#x27;</span>]</span><br><span class="line">    orlder = portT(inText, ioPadAttr)</span><br><span class="line">    <span class="built_in">input</span> = portDeclare(inText, ioPadAttr[<span class="number">0</span>])</span><br><span class="line">    output = portDeclare(inText, ioPadAttr[<span class="number">1</span>])</span><br><span class="line">    inout = portDeclare(inText, ioPadAttr[<span class="number">2</span>])</span><br><span class="line">    interface = portDeclare(inText, ioPadAttr[<span class="number">3</span>])</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">    portList = formatPort(formatPort_order(</span><br><span class="line">        getPortMap([<span class="built_in">input</span>, output, inout,interface], ioPadAttr), orlder))</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">    <span class="built_in">input</span> = formatDeclare(<span class="built_in">input</span>, <span class="string">&#x27;reg&#x27;</span>)</span><br><span class="line">    output = formatDeclare(output, <span class="string">&#x27;wire&#x27;</span>)</span><br><span class="line">    inout = formatDeclare(inout, <span class="string">&#x27;wire&#x27;</span>)</span><br><span class="line">    interface = formatDeclare(interface, <span class="string">&#x27;wire&#x27;</span>)</span><br><span class="line">    <span class="comment"># write Instance</span></span><br><span class="line"></span><br><span class="line"></span><br><span class="line">    <span class="comment"># module_parameter_port_list</span></span><br><span class="line">    <span class="keyword">if</span>(paraDec != <span class="string">&#x27;&#x27;</span>):</span><br><span class="line">        print(<span class="string">&quot;// %s Parameters\n%s\n&quot;</span> % (name, paraDec))</span><br><span class="line"></span><br><span class="line"></span><br><span class="line">    <span class="comment"># list_of_port_declarations</span></span><br><span class="line">    <span class="comment">#print(&quot;// %s Inputs\n%s\n&quot; % (name, input))</span></span><br><span class="line">    <span class="comment">#print(&quot;// %s Outputs\n%s\n&quot; % (name, output))</span></span><br><span class="line">    <span class="comment">#if(inout != &#x27;&#x27;):</span></span><br><span class="line">    <span class="comment">#    print(&quot;// %s Bidirs\n%s\n&quot; % (name, inout))</span></span><br><span class="line">    print(<span class="string">&quot;\n&quot;</span>)</span><br><span class="line">    <span class="comment"># UUT</span></span><br><span class="line">    print(<span class="string">&quot;%s %s inst_%s (\n%s\n);&quot;</span> % (name, paraDef, name, portList))</span><br><span class="line"></span><br><span class="line"></span><br><span class="line"><span class="keyword">if</span> __name__ == <span class="string">&#x27;__main__&#x27;</span>:</span><br><span class="line">     writeTestBench(sys.argv[<span class="number">1</span>])</span><br></pre></td></tr></table></figure>
<h1 id="more">More</h1>
<h2 id="verilog-snippet-可以提供更强大的补全"><a target="_blank" rel="noopener" href="https://marketplace.visualstudio.com/items?itemName=czh.czh-verilog-snippet">Verilog Snippet</a> 可以提供更强大的补全</h2>
<figure>
<img src="https://pic.zhouyuqian.com/img/20210727233415.png" alt="截屏2021-03-15 下午3.28.17"><figcaption aria-hidden="true">截屏2021-03-15 下午3.28.17</figcaption>
</figure>
<h2 id="自定义补全">自定义补全</h2>
<p>其实关于自动补全，还可以前往 "Preference-&gt;User Snippets"，来添加您自己的代码，虽然这个操作目前还是比较麻烦的。</p>
<figure>
<img src="https://pic.zhouyuqian.com/img/20210727233416.png" alt="截屏2021-03-15 下午3.31.12"><figcaption aria-hidden="true">截屏2021-03-15 下午3.31.12</figcaption>
</figure>
<h1 id="reference">Reference</h1>
<p>[1] <a target="_blank" rel="noopener" href="https://blog.fkynjyq.com/write-verilog-with-vscode/"><strong>HDL 的现代代码编辑体验——配置 VS Code 的 Verilog 开发环境</strong></a></p>
<p>[2] <a target="_blank" rel="noopener" href="https://zhuanlan.zhihu.com/p/338497672">用VSCode编辑verilog代码、iverilog编译、自动例化、自动补全、自动格式化等常用插件</a></p>

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        <div style="text-align:center;color: #ccc;font-size:14px;">-------The end of this article&nbsp;<i class="fa fa-paw"></i>&nbsp;Thank you for your reading-------</div>
    
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    <a href="https://zhouyuqian.com/2021/03/15/VerilogOnVscode/" title="配置 VS Code 的 Verilog 开发环境">https://zhouyuqian.com/2021/03/15/VerilogOnVscode/</a>
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    <strong>版权声明： </strong>本博客所有文章除特别声明外，均采用 <a href="https://creativecommons.org/licenses/by-nc-sa/4.0/zh" rel="noopener" target="_blank"><i class="fa fa-fw fa-creative-commons"></i>BY-NC-SA</a> 许可协议。转载请注明出处！
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